cocotb
11 posts
Unlocking the Combined Strength of UVM and Python
UVM and Python are often positioned as rivals when it comes to their role in functional verification, with teams picking one or the other as the basis for a verification environments. Each have strengths, though, and using them together produces much strong…
DPI Isn't Enough: Making Python Part of Your SV Testbench
I've been using Python for verification since early 2019 for personal projects, and have found both the language and the rich ecosystem of general and special-purpose libraries to be incredibly helpful in quickly and efficiently bringing up a testbench enviro…
TbLink-RPC: Simplifying the Multi-Language Testbench
[](/legacy-img/MultiLanguageTestbenchsplash.png) SystemVerilog/UVM is, by far, the most widely-used language and methodology for block and subsystem-level verification environments today. The simplicity of that statement overlooks the fact that it’s oft…
SoC Integration Testing: IP-Integrated Debug and Analysis
[](/legacy-img/splash-8.png) One of the things I've always liked about side projects is the freedom to stop and explore a topic of interest as it comes up. One such topic that came up for me recently is IP-integrated debug and analysis instrumentation. I st…
SoC Integration Testing: Higher-Level Software Debug Visibility
[](/legacy-img/splash-14.png) Debug is a key task in any development task. Whether debugging application-level software or a hardware design, a key to productive debug is getting a higher-level view of what is happening in the design. Blindly stepping…
2020: Nights and Weekends Projects in Review
[](/legacy-img/splash-2.png) 2020 in Review Last year was my first year-end blog post looking back at the prior year's projects, and I thought I'd continue the (now) tradition this year. 2020 has definitely been a different year for me, and not just bec…
Modeling Random Stimulus and Functional Coverage in Python
[](/legacy-img/ModelingRandomStimulusSplash.png) If you've been following the blog over the last year, you've probably noticed that I've spent quite a bit of time over the last year learning and using Python. For several reasons, it's become my new favor…
Selectively Muting your BFMs to Speed up Simulation
[](/legacy-img/splash-7.png) Have you ever had the misfortune to be on the CC list for a "lively" email discussion where you're a stakeholder but only case about the conclusion? You can't simply ignore the traffic, because you do care about the conclusio…
2019 - The "Nights and Weekends Projects" Year in Review
[](/legacy-img/splash-16.png) It's almost the end of 2019, and I've been thinking back over the year as well as thinking ahead to 2020. In past years, I've often evaluated my "nights and weekends" projects using the same metrics I'm evaluated on at work:…
Writing a Task-Based Cocotb BFM
[](/legacy-img/splash-6.png) Background The purpose of a Bus Functional Model (BFM) is to enable interacting with a design via a given protocol at a higher level of abstraction than the signal-level protocol, while knowing the bare minimum about the…
Adding Task-Based Bus Functional Models to Cocotb
[](/legacy-img/splash-12.png) Getting a project started -- even to a certain level of completeness -- is often pretty simple. A couple weekends of hacking often results in pretty good progress and results. Finishing things up, in contrast, is often…